sandeep goel
Bio

11 years of research and engineering program management experience for big corporations across Europe, USA, and Asia. Proven success in innovation and management of test/design-for-test/yield improvement projects for research, semiconductor, EDA and foundry companies. Strong interpersonal, communication and problem solving skills. Holds seven US/European patents and have over 15 patents pending Published over 70 papers/articles in various journals and refereed IEEE conference and workshops proceedings. Specialties Research program management, Test/DfT methodologies, yield improvement techniques, failure analysis, core-based testing, silicon debug, BIST, test compression, multi-site testing, test methodologies for power-aware designs, small delay defect testing and ATPG.

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